Creato modulo SumDataAdapter

This commit is contained in:
2019-08-29 19:53:30 +02:00
parent fd3a046f3e
commit d077d1fe84
4 changed files with 146 additions and 61 deletions

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Normalizer.vhd Normal file
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity Normalizer is
port(
SIGN : in std_logic;
EXP : in std_logic_vector(7 downto 0);
MANT : in std_logic_vector(47 downto 0);
OVERFLOW : in std_logic;
IEEE_754_SUM : out std_logic_vector(31 downto 0)
);
end Normalizer;
architecture NormalizerArch of Normalizer is
begin
end NormalizerArch;